This invention relates to the dense packaging of electronic circuitry, and specifically to the stacking of integrated circuit (IC) chips, or die.
A publication titled "Three-Dimensional Electronics Packaging" was issued in November, 1993 by Tech Search International. It describes the 3-D packaging techniques offered by over thirty manufacturers. It includes a table comparing 23 types of packaging in terms of density, manufacturability, flexibility and affordability. The publication also refers to four types of 3-D stacking techniques, one of which is "bare die stacking". It then divides "bare die assembly" into "standard ICS" and "custom ICs".
The assignee of this application, Irvine Sensors Corporation, has been a leader in developing high density packaging of IC chips, originally for use in focal plane modules, and then for use in a variety of computer functions, such as memory. In the publication cited in the preceding paragraph, Irvine Sensors is listed as a developer of "bare die assemblies" using "custom ICs".
Generally, stacking of IC chips has emphasized use of identical-area chips, each of which performs the same function. The resulting stack is a rectangular parallelepiped (or cube) having substantially planar outer surfaces. One or more of the outer surfaces is an access plane, reached by electrical leads from the IC circuitry of the stacked chips, in order to permit connection to external circuitry.
An early effort to provide a 3-D electronics stack combining different functions, different area electronic chips is illustrated by Kravitz et al U.S. Pat. No. 3,370,203. That patent shows stacked "frame" having dimensions "such that integrated circuits which have slightly different dimensions can be mounted thereon", explaining that "integrated circuits from different sources of supply are often advantageously incorporated in a single module".